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Gabriela Nicolescu

Professeure titulaire
Département de génie informatique et génie logiciel

Publications à Polytechnique

Ces données sont extraites du Répertoire des publications de l'École Polytechnique de Montréal. La liste ci-dessous contient seulement les publications auxquelles a participé le professeur ou le chercheur depuis son entrée en fonction à l’École. De plus, certaines publications ne sont pas dans cette liste, notamment les notes de cours et les rapports techniques internes plus d'information...

1Trajkovic, J., Abdi, S., Nicolescu, G., Gajski, D.D. (2012). Automated Generation of Custom Processor Core From C Code. Journal of Electrical and Computer Engineering, p. Art. No.: 862469. 
2Bouchebaba, Y., Ozcan, A.-E., Paulin, P., Nicolescu, G. (2012). MpAssign : a Framework for Solving the Many-Core Platform Mapping Problem. Software-Practice & Experience, 42(7), p. 891-915. 
3Le Beux, S., Trajkovic, J., O'Connor, I., Nicolescu, G. (2011). Layout Guidelines for 3D Architectures Including Optical Ring Network-on-Chip (ORNoC). IEEE, p. 242-247. 
4Fourmigue, A., Beltrame, G., Nicolescu, G., Aboulhamid, E.M. (2011). A Linear-Time Approach for the Transient Thermal Simulation of Liquid-Cooled 3D ICs. Embedded Systems Week 2011, ESWEEK 2011 - 9th IEEE, p. 197-205. 
5Fourmigue, A., Beltrame, G., Nicolescu, G., Aboulhamid, E.M., O'Connor, I. (2011). Multi-Granularity Thermal Evaluation of 3D MPSoC Architectures. 14th Design, Automation and Test in Europe Conference and Exhibition, DATE 2011, p. 575-578. 
6Beltrame, G., Nicolescu, G. (2011). A Multi-Objective Decision-Theoretic Exploration Algorithm for Platform-Based Design. 14th Design, Automation and Test in Europe Conference and Exhibition, DATE 2011, p. 1192-1195. 
7Le Beux, S., Trajkovic, J., O'Connor, I., Nicolescu, G., Bois, G., Paulin, P. (2011). Optical Ring Network-on-Chip (ORNoC): Architecture and Design Methodology. 14th Design, Automation and Test in Europe Conference and Exhibition, DATE 2011, p. 788-793. 
8Gaillardon, P.-E., Clermidy, F., O'connor, I., Liu, J., Amadou, M., Nicolescu, G. (2011). Matrix Nanodevice-Based Logic Architectures and Associated Functional Mapping Method. ACM Journal on Emerging Technologies in Computing Systems, 7.
9Le Beux, S., Nicolescu, G., Bois, G., Paulin, P. (2010). A System-Level Exploration Flow for Optical Network on Chip (ONoC) in 3D MPSoC. IEEE International Symposium on Circuits and Systems. ISCAS 2010, p. 3613-3616. 
10Le Beux, S., Bois, G., Nicolescu, G., Bouchebaba, Y., Langevin, M., Paulin, P. (2010). Combining Mapping and Partitioning Exploration for NoC-Based Embedded Systems. Journal of Systems Architecture, 56(7), p. 223-232. 
11Girodias, B., Gheorghe, L., Bouchebaba, Y., Nicolescu, G., Aboulhamid, E.M., Langevin, M., Paulin, P. (2010). Combining Memory Optimization With Mapping of Multimedia Applications for Multi-Processors System-on-Chip. 21st IEEE International Symposium on Rapid System Prototyping (RSP), p. 9. 
12Le Beux, S., Trajkovic, J., O'Connor, I., Nicolescu, G., Bois, G., Paulin, P. (2010). Multi-Optical Network-on-Chip for Large Scale MPSoC. IEEE Embedded Systems Letters, 2(3), p. 77-80. 
13Le Beux, S., Nicolescu, G., Bois, G., Bouchebaba, Y., Langevin, M., Paulin, P. (2009). Optimizing Configuration and Application Mapping for MPSoC Architectures. NASA, p. 474-481. 
14Fourmigue, A., Girodias, B., Nicolescu, G., Aboulhamid, E.M. (2009). Co-Simulation Based Platform for Wireless Protocols Design Explorations. Design, Automation and Test in Europe Conference and Exhibition, p. 874-877. 
15Girodias, B., Bouchebaba, Y., Nicolescu, G., Aboulhamid, E.M., Paulin, P., Lavigueur, B. (2009). Multiprocessor, Multithreading and Memory Optimization for on-Chip Multimedia Applications. Journal of Signal Processing Systems, 57(2), p. 263-283. 
16Gheorghe, L., Bouchhima, F., Nicolescu, G., Boucheneb, H. (2008). Semantics for Model-Based Validation of Continuous/Discrete Systems. Design, Automation and Test in Europe. DATE'08, p. 498-503. 
17Bensoudane, E., Tonietto, D., Gheorghe, L., Nicolescu, G. (2008). System-Level Design of Continuous/Discrete-Time Heterogeneous Systems Applied to High-Speed Serial Link. Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference, NEWCAS-TAISA 2008, p. 189-192. 
18Bouchebaba, Y., Girodias, B., Nicolescu, G., Coelho, F., Aboulhamid, E.M. (2007). Buffer and Register Allocation for Memory Space Optimization. Journal of Vlsi Signal Processing Systems for Signal Image and Video Technology, 49(1), p. 123-138. 
19Bouchhima, F., Nicolescu, G., Aboulhamid, E.M., Abid, M. (2007). Generic Discrete-Continuous Simulation Model for Accurate Validation in Heterogeneous Systems Design. Microelectronics Journal, 38(6-7), p. 805-815. 
20Bouchebaba, Y., Girodias, B., Nicolescu, G., Aboulhamid, E.M., Lavigueur, B., Paulin, P. (2007). MPSoC Memory Optimization Using Program Transformation. ACM Transactions on Design Automation of Electronic Systems, 12(4), p. 43. 
21Briere, M., Girodias, B., Bouchebaba, Y., Nicolescu, G., Mieyeville, F., Gaffiot, F., O'Connor, I. (2007). System Level Assessment of an Optical NoC in an MPSoC Platform. 2007 Design, Automation and Test in Europe Conference and Exhibition, p. 1084-1089. 
22Hireche, N., Langlois, J.M.P., Nicolescu, G. (2007). A Systolic Array for Sequence Comparison Based on Two Logic Levels Processing Element. IEEE Northeast Workshop on Circuits and Systems. NEWCAS 2007, p. 73-76. 
23Lapalmet, J., Aboulhamid, E.M., Nicolescu, G., Rousseau, F. (2007). Separating Modeling and Simulation Aspects in Hardware/Software Framework-Based Modeling Languages. Arabian Journal for Science and Engineering, 32(2C), p. 41-60. 
24Bouchebaba, Y., Gagne, V., Nicolescu, G., Aboulhamid, M. (2006). SoC Memory Optimization Using Loop Transformations. The 4th International IEEE-NEWCAS Conference.
25Nicolescu, G., Bouchhima, F., Gheorghe, L. (2006). CODIS - a Framework for Continuous/Discrete Systems Co-Simulation. Preprints. ADHS'06 2nd IFAC Conference on Analysis and Design of Hybrid Systems, p. 274-275. 
26Bouchhima, F., Briere, M., Nicolescu, G., Abid, M., Aboulhamid, E.M. (2006). A SystemC/Simulink Co-Simulation Framework for Continuous/Discrete-Events Simulation. Proceedings of the 2006 IEEE International Behavioral Modeling and Simulation Workshop, p. 1-6. 
27Girodias, B., Bouchebaba, Y., Nicolescu, G., Aboulhamid, E.M., Paulin, P., Lavigueur, B. (2006). Application-Level Memory Optimization for MPSoC. 17th IEEE International Workshop on Rapid System Prototyping, p. 169-175. 
28Paulin, P.G., Pilkington, C., Langevin, M., Bensoudane, E., Lyonnard, D., Benny, O., Lavigueur, B., Lo, D., Beltrame, G., Gagne, V., Nicolescu, G. (2006). Parallel Programming Models for a Multiprocessor Soc Platform Applied to Networking and Multimedia. IEEE Transactions on Very Large Scale Integration (Vlsi) Systems, 14(7), p. 667-680. 
29Nicolescu, B., Ignat, N., Savaria, Y., Nicolescu, G. (2006). Analysis of Real-Time Systems Sensitivity to Transient Faults Using MicroC Kernel. IEEE Transactions on Nuclear Science, 53(4), p. 1902-1909. 
30Gheorghe, L., Bouchhima, F., Nicolescu, G., Boucheneb, H. (2006). Formal Definitions of Simulation Interfaces in a Continuous/Discrete Co-Simulation Tool. Seventeenth IEEE International Workshop on Rapid System Prototyping, p. 186-192. 
31Ignat, N., Nicolescu, B., Savaria, Y., Nicolescu, G. (2006). Soft-Error Classification and Impact Analysis on Real-Time Operating Systems. 2006 Design Automation and Test in Europe. Proceedings, p. 180-185. 
32Bouchebaba, Y., Nicolescu, G., Aboulhamid, E., Coelho, F. (2006). Buffer and Register Allocation for Memory Space Optimization. IEEE 17th International Conference on Application-Specific Systems, Architectures and Processors, Proceedings, p. 283-290. 
33Provost, S., Lavigueur, B., Bois, G., Nicolescu, G. (2006). Integration of Configurable Processors in a Multiprocessor Platform. IEEE International Soc Conference , Proceedings, p. 221-224. 
34Hireche, N., Langlois, J.M.P., Nicolescu, G. (2006). Survey of Biological High Performance Computing: Algorithms, Implementations and Outlook Research. CCECE'06. Canadian Conference on Electrical and Computer Engineering, p. 1926-1929. 
35Grou-Szabo, R., Ghattas, H., Savaria, Y., Nicolescu, G. (2005). Component-Based Methodology for Hardware Design of a Dataflow Processing Network. Fifth International Workshop on System-on-Chip for Real-Time Applications, Proceedings, p. 289-294. 
36Gheorghe, L., Nicolescu, G. (2005). Mp Socs Including Optical Interconnect. Technological Progresses and Challenges for CAD Tools Design. Fifth International Workshop on System-on-Chip for Real-Time Applications, Proceedings, p. 546-551. 
37Nicolescu, B., Ignat, N., Savaria, Y., Nicolescu, G. (2005). Sensitivity of Real-Time Operating Systems to Transient Faults : A Cause Study for MicroC Kernel. 8th European Conference on Radiation and Its Effects on Components and Systems (RADECS 2005).
38Calvez J.-P., Nicolescu G. (2004). Spécification et modélisation des systèmes logiciels/matériels. Spécification et validation des systèmes monopuces. Lavoisier. p. 19-56.
39Gorse, N., Metzger, M., Lapalme, J., Aboulhamid, E.M., Savaria, y., Nicolescu, G. (2004). Enhancing ESys.Net With a Semi-Formal Verification Layer. ICM 2004 : the 16th International Conference on Microelectronics, Proceedings, p. 388-391. 
40Jerraya A.A., Nicolescu G. (2004). Méthodes de validation pour systèmes hétérogènes. Spécification et validation des systèmes monopuces. Lavoisier. p. 57-100.
41Jerraya A.A., Nicolescu G., Yoo S. (2004). Modèle de simulation pour logiciel et systèmes d'exploitation enfouis. Spécification et validation des systèmes monopuces. Lavoisier. p. 101-120.
42Lapalme, J., Aboulhamed, E.M., Nicolescu, G., Charest, L., Boyer, F.R., David, J.P., Bois, G. (2004). Esys.Net: A New Solution for Embedded Systems Modeling and Simulation. Acm Sigplan Notices, 39(7), p. 107-114. 
43Lapalme, J., Aboulhamid, E.M., Nicolescu, G., Charest, L., Boyer, F.R., David, J.P., Bois, G. (2004). Robust Estimation of LP Parameters in White Noise With Unknown Variance. Design, Automation and Test in Europe. DATE 2004, p. 732-733. 
44Boyer, F.R., Yang, L., Aboulamid, E.M., Charest, L., Nicolescu, G. (2003). Multiple SimpleScalar Processors With Introspection, Under SystemC. 46th IEEE International Midwest Symposium on Circuits and Systems, p. 1400-1404. 

 

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