Ahmadi, M., Vakili, S. & Langlois, J.M.P. (2021). CARLA: A Convolution Accelerator with a Reconfigurable and Low-Energy Architecture. IEEE Transactions on Circuits and Systems I: Regular Papers, 68(8), 3184-3196. Tiré de https://doi.org/10.1109/TCSI.2021.3066967
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Langlois, J. M. Pierre

Répertoire des expertises
Langlois, J. M. Pierre
Répertoire des expertises
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Article de revue (34)
Communication de conférence (73)
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Pierre Langlois (110)
- Articles de revue (34)
- 2021
Article de revue
- 2020
Article de revue Levesque, M., Gao, H., Southward, C., Langlois, J.M.P., Lena, C. & Courtemanche, R. (2020). Cerebellar Cortex 4-12 Hz Oscillations and Unit Phase Relation in the Awake Rat. Frontiers in Systems Neuroscience, 14, 17 pages. Tiré de https://doi.org/10.3389/fnsys.2020.475948Article de revue Abdelsalam, A.M., Elsheikh, A., Chidambaram, S., David, J.-P. & Langlois, J.M.P. (2020). POLYBiNN: Binary Inference Engine for Neural Networks using Decision Trees. Journal of Signal Processing Systems, 92(1), 95-107. Tiré de https://doi.org/10.1007/s11265-019-01453-w
- 2019
Article de revue Stimpfling, T., Belanger, N., Langlois, J.M.P. & Savaria, Y. (2019). SHIP: a scalable high-performance IPv6 lookup algorithm that exploits prefix characteristics. IEEE/ACM Transactions on Networking, 27(4), 1529-1542. Tiré de https://doi.org/10.1109/TNET.2019.2926230
- 2018
Article de revue Vakili, S., Langlois, J.M.P., Savaria, Y. & Manjikian, N. (2018). Enhanced Bloom filter utilisation scheme for string matching using a splitting approach. IET Communications, 12(7), 868-875. Tiré de https://doi.org/10.1049/iet-com.2017.1093Article de revue Mosleh, A., Elmi Sola, Y., Zargari, F., Onzon, E. & Langlois, J.M.P. (2018). Explicit ringing removal in image deblurring. IEEE Transactions on Image Processing, 27(2), 580-593. Tiré de https://doi.org/10.1109/TIP.2017.2764625Article de revue Bendaoudi, H., Cheriet, F., Manraj, A., Ben Tahar, H. & Langlois, J.M.P. (2018). Flexible architectures for retinal blood vessel segmentation in high-resolution fundus images. Journal of Real-Time Image Processing, 15(1), 31-42. Tiré de https://doi.org/10.1007/s11554-016-0661-4
- 2017
Article de revue Gao, S., Al-Khalili, D., Langlois, J.M.P. & Chabini, N. (2017). Efficient realization of BCD multipliers using FPGAs. International Journal of Reconfigurable Computing, 2017. Tiré de https://doi.org/10.1155/2017/2410408
- 2016
Article de revue Vakili, S., Langlois, J.M.P. & Bois, G. (2016). Accuracy-aware processor customisation for fixed-point arithmetic. IET Computers and Digital Techniques, 10(1), 11 pages. Tiré de https://doi.org/10.1049/iet-cdt.2014.0188Article de revue Farah, R., Langlois, J.M.P. & Bilodeau, G.-A. (2016). Computing a rodent's diary. Signal, Image and Video Processing, 10(3), 567-574. Tiré de https://doi.org/10.1007/s11760-015-0776-2Article de revue Seoud, L., Hurtut, T., Chelbi, J., Cheriet, F. & Langlois, J.M.P. (2016). Red lesion detection using dynamic shape features for diabetic retinopathy screening. IEEE Transactions on Medical Imaging, 35(4), 1116-1126. Tiré de https://doi.org/10.1109/TMI.2015.2509785
- 2015
Article de revue Bilodeau, G.-A., Desgent, S., Farah, R., Duss, S., Langlois, J.M.P. & Carmant, L. (2015). Body temperature measurement of an animal by tracking in biomedical experiments. Signal Image and Video Processing, 9(2), 251-259. Tiré de https://doi.org/10.1007/s11760-013-0502-x
- 2014
Article de revue Farah, R., Gan, Q., Langlois, J.M.P., Bilodeau, G.-A. & Savaria, Y. (2014). A computationally efficient importance sampling tracking algorithm. Machine Vision and Applications, 25(7), 1761-1777. Tiré de https://doi.org/10.1007/s00138-014-0630-5Article de revue Gan, Q., Langlois, J.M.P. & Savaria, Y. (2014). A Parallel Systematic Resampling Algorithm for High-Speed Particle Filters in Embedded Systems. Circuits, Systems & Signal Processing, 33(11), 3591-3602. Tiré de https://doi.org/10.1007/s00034-014-9820-7Article de revue Gan, Q.F., Langlois, J.M.P. & Savaria, Y. (2014). Efficient Uniform Quantization Likelihood Evaluation for Particle Filters in Embedded Implementations. Journal of Signal Processing Systems for Signal Image and Video Technology, 75(3), 191-202. Tiré de https://doi.org/10.1007/s11265-013-0798-3
- 2013
Article de revue Farah, R., Langlois, J.M.P. & Bilodeau, G.-A. (2013). Catching a rat by its edglets. IEEE Transactions on Image Processing, 22(2), 668-678. Tiré de https://doi.org/10.1109/TIP.2012.2221726Article de revue Vakili, S., Langlois, J.M.P. & Bois, G. (2013). Customised soft processor design: A compromise between architecture description languages and parameterisable processors. IET Computers and Digital Techniques, 7(3), 122-131. Tiré de https://doi.org/10.1049/iet-cdt.2012.0088Article de revue Vakili, S., Langlois, J.M.P. & Bois, G. (2013). Enhanced precision analysis for accuracy-aware bit-width optimization using affine arithmetic. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 32(12), 1853-1865. Tiré de https://doi.org/10.1109/TCAD.2013.2277978Article de revue Gan, Q., Langlois, J.M.P. & Savaria, Y. (2013). Parallel array histogram architecture for embedded implementations. Electronics Letters, 49(2), 99-101. Tiré de https://doi.org/10.1049/el.2012.2701
- 2012
Article de revue Gao, S., Al-Khalili, D., Chabini, N. & Langlois, J.M.P. (2012). Asymmetric large size multipliers with optimised FPGA resource utilisation. IET Computers and Digital Techniques, 6(6), 372-83. Tiré de https://doi.org/10.1049/iet-cdt.2011.0146Article de revue Bilodeau, G.-A., Torabi, A., Levesque, M., Ouellet, C., Langlois, J.M.P., Lema, P. & Carmant, L. (2012). Body Temperature Estimation of a Moving Subject From Thermographic Images. Machine Vision and Applications, 23(2), 299-311. Tiré de https://doi.org/10.1007/s00138-010-0313-9Article de revue Mahvash Mohammadi, H., Savaria, Y. & Langlois, J.M.P. (2012). Enhanced motion compensated deinterlacing algorithm. IET Image Processing, 6(8), 1041-1048. Tiré de https://doi.org/10.1049/iet-ipr.2011.0124Article de revue Aubertin, P., Langlois, J.M.P. & Savaria, Y. (2012). Real-time computation of local neighborhood functions in application-specific instruction-set processors. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 20(11), 2031-2043. Tiré de https://doi.org/10.1109/TVLSI.2011.2170204
- 2011
Article de revue Mohammadi, H.M., Savaria, Y. & Langlois, J.M.P. (2011). Hybrid video deinterlacing algorithm exploiting reverse motion estimation. IET Image Processing, 5(7), 611-618. Tiré de https://doi.org/10.1049/iet-ipr.2010.0111
- 2010
Article de revue Gao, S., Chabini, N., Al-Khalili, D. & Langlois, J.M.P. (2010). FPGA-based efficient design approaches for large size two's complement squarers. Journal of Signal Processing Systems, 58(1), 3-15. Tiré de https://doi.org/10.1007/s11265-008-0275-6Article de revue Islam, A., Iqbal, U., Langlois, J.M.P. & Noureldin, A. (2010). Implementation methodology of embedded land vehicle positioning using an integrated GPS and multi sensor system. Integrated Computer-Aided Engineering, 17(1), 69-83. Tiré de https://doi.org/10.3233/ICA-2010-0330
- 2009
Article de revue Levesque, M., Langlois, J.M.P., Lema, P., Courtemanche, R., Bilodeau, G.A. & Carmant, L. (2009). Synchronized Gamma Oscillations (30-50 Hz) in the Amygdalo-Hippocampal Network in Relation With Seizure Propagation and Severity. Neurobiology of Disease, 35(2), 209-218. Tiré de https://doi.org/10.1016/j.nbd.2009.04.011
- 2008
Article de revue Lévesque, M., Lema, P., Langlois, J.M.P., Courtemanche, R. & Carmant, L. (2008). Local field potential synchrony in the amygdalo-hippocampal network during kainate induced-seizures. Clinical Neurophysiology, 119(9), e96. Tiré de https://doi.org/10.1016/j.clinph.2008.04.284
- 2007
Article de revue Mohammadi, H.M., Langlois, J.M.P. & Savaria, Y. (2007). A Five-Field Motion Compensated Deinterlacing Method Based on Vertical Motion. IEEE Transactions on Consumer Electronics, 53(3), 1117-1124. Tiré de https://doi.org/10.1109/TCE.2007.4341594Article de revue Gao, S., Chabini, N., Al-Khalili, D. & Langlois, J.M.P. (2007). Optimised Realisations of Large Integer Multipliers and Squarers Using Embedded Blocks. IET Computers and Digital Techniques, 1(1), 9-16. Tiré de https://doi.org/10.1049/iet-cdt:20060074
- 2006
Article de revue Langlois, J.M.P. & Al-Khalili, D. (2006). Carry-free approximate squaring functions with O(n) complexity and O(1) delay. IEEE Transactions on Circuits and Systems II: Express Briefs, 53(5), 374-378. Tiré de https://doi.org/10.1109/TCSII.2006.873364
- 2004
Article de revue Langlois, J.M.P. & Al-Khalili, D. (2004). Phase to sinusoid amplitude conversion techniques for direct digital frequency synthesis. IEE Proceedings-Circuits, Devices and Systems, 151(6), 519-528. Tiré de https://doi.org/10.1049/ip-cds:20040500
- 2003
Article de revue Langlois, J.M.P. & Al-Khalili, D. (2003). Novel approach to the design of direct digital frequency synthesizers based on linear interpolation. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 50(9), 567-578. Tiré de https://doi.org/10.1109/TCSII.2003.815020
- 2002
Article de revue Langlois, J.M.P., Al-Khalili, D. & Inkol, R.J. (2002). Polyphase filter approach for high performance, FPGA-based quadrature demodulation. Journal of VLSI Signal Processing Systems for Signal, Image and Video Technology, 32(3), 237-254. Tiré de https://doi.org/10.1023/A:1020268902913
- 2021
- Communications de conférence (73)
- 2022
Communication de conférence Traore, M., Langlois, J.M.P. & David, J.P. (2022). Asip accelerator for LUT-based neural networks inference. Communication présentée à 20th IEEE Interregional NEWCAS Conference (NEWCAS 2022), Quebec City, Qc, Canada (p. 524-528). Tiré de https://doi.org/10.1109/NEWCAS52662.2022.9842211
- 2021
Communication de conférence Luinaud, T., Santiago da Silva, J., Langlois, J.M.P. & Savaria, Y. (2021). Design principles for packet deparsers on FPGAs. Communication présentée à ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2021) (p. 280-286). Tiré de https://doi.org/10.1145/3431920.3439303
- 2020
Communication de conférence Ahmadi, M., Vakili, S. & Langlois, J.M.P. (2020). An energy-efficient accelerator architecture with serial accumulation dataflow for deep CNNs. Communication présentée à 18th IEEE International New Circuits and Systems Conference (NEWCAS 2020), Montréal, Québec (p. 214-217). Tiré de https://doi.org/10.1109/NEWCAS49341.2020.9159818Communication de conférence Luinaud, T., Stimpfling, T., Santiago da Silva, J., Savaria, Y. & Langlois, J.M.P. (2020). Bridging the gap: FPGAs as programmable switches. Communication présentée à 21st IEEE International Conference on High Performance Switching and Routing (HPSR 2020), En ligne / Online (7 pages). Tiré de https://doi.org/10.1109/HPSR48589.2020.9098978Communication de conférence Ahmadi, M., Vakili, S. & Langlois, J.M.P. (2020). Heterogeneous distributed SRAM configuration for energy-efficient deep CNN accelerators. Communication présentée à 18th IEEE International New Circuits and Systems Conference (NEWCAS 2020), Montréal, Québec (p. 287-290). Tiré de https://doi.org/10.1109/NEWCAS49341.2020.9159814Communication de conférence Chidambaram, S., Langlois, J.M.P. & David, J.P. (2020). PoET-BiN : Power Efficient Tiny Binary Neurons. Communication présentée à 3rd Conference on Machine Learning and Systems (MLSys 2020), Austin, Texas (12 pages). Tiré de https://proceedings.mlsys.org/book/2020/file/35f4a8d465e6e1edc05f3d8ab658c551-Paper.pdf
- 2019
Communication de conférence Santiago Da Silva, J., Boyer, F.-R. & Langlois, J.M.P. (2019). Module-per-object: A human-driven methodology for c++-based high-level synthesis design. Communication présentée à 27th Annual IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM 2019), San Diego, CA, United states (p. 218-226). Tiré de https://doi.org/10.1109/FCCM.2019.00037Communication de conférence Abdelsalam, A.M., Elsheikh, A., David, J.-P. & Langlois, J.M.P. (2019). POLYCiNN: Multiclass Binary Inference Engine using Convolutional Decision Forests. Communication présentée à 13th Conference on Design and Architectures for Signal and Image Processing (DASIP 2019), Montréal, Qc, Canada (p. 13-18). Tiré de https://doi.org/10.1109/DASIP48288.2019.9049176
- 2018
Communication de conférence Chidambaram, S., Riviello, A., Langlois, J.M.P. & David, J.P. (2018). Accelerating the Inference Phase in Ternary Convolutional Neural Networks Using Configurable Processors. Communication présentée à Conference on Design and Architectures for Signal and Image Processing (DASIP 2018), Porto, Portugal (p. 94-99). Tiré de https://doi.org/10.1109/DASIP.2018.8596860Communication de conférence Stimpfling, T., Langlois, J.M.P., Bélanger, N. & Savaria, Y. (2018). A low-latency memory-efficient IPv6 lookup engine implemented on FPGA using high-level synthesis. Communication présentée à 18th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGrid 2018), Washington, D.C. (p. 402-411). Tiré de https://doi.org/10.1109/CCGRID.2018.00067Communication de conférence Abdelsalam, A.M., Boulet, F., Demers, G., Langlois, J.M.P. & Cheriet, F. (2018). An Efficient FPGA-based Overlay Inference Architecture for Fully Connected DNNs. Communication présentée à International Conference on ReConFigurable Computing and FPGAs (ReConFig 2018), Cancun, Mexico (6 pages). Tiré de https://doi.org/10.1109/RECONFIG.2018.8641735Communication de conférence Léonardon, M., Leroux, C., Binet, D., Langlois, J.M.P., Jégo, C. & Savaria, Y. (2018). Custom low power processor for polar decoding. Communication présentée à IEEE International Symposium on Circuits & Systems (ISCAS 2018), Florence, Italy. Tiré de https://doi.org/10.1109/ISCAS.2018.8351739Communication de conférence Santiago da Silva, J., Boyer, F.-R., Chiquette, L.-O. & Langlois, J.M.P. (2018). Extern objects in P4: an ROHC compressing scheme case study. Communication présentée à IEEE Conference on Network Softwarization (NetSoft 2018), Montréal, Québec. Tiré de https://doi.org/10.1109/NETSOFT.2018.8460108Communication de conférence Santiago da Silva, J., Boyer, F.-R. & Langlois, J.M.P. (2018). P4-compatible high-level synthesis of low latency 100 Gb/s streaming packet parsers in FPGAs. Communication présentée à ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2018), Monterey, California, USA (p. 147-152). Tiré de https://doi.org/10.1145/3174243.3174270Communication de conférence Abdelsalam, A.M., Elsheikh, A., David, J.P. & Langlois, J.M.P. (2018). POLYBiNN: A Scalable and Efficient Combinatorial Inference Engine for Neural Networks on FPGA. Communication présentée à Conference on Design and Architectures for Signal and Image Processing (DASIP 2018), Porto, Portugal (p. 19-24). Tiré de https://doi.org/10.1109/DASIP.2018.8596871Communication de conférence Ahmadi, M., Vakili, S., Langlois, J.M.P. & Gross, W.J. (2018). Power Reduction in CNN Pooling Layers with a Preliminary Partial Computation Strategy. Communication présentée à 16th IEEE International New Circuits and Systems Conference (NEWCAS 2018), Montréal, Québec (p. 125-129). Tiré de https://doi.org/10.1109/NEWCAS.2018.8585433
- 2017
Communication de conférence Abdelsalam, A.M., Langlois, J.M.P. & Cheriet, F. (2017). A Configurable FPGA Implementation of the Tanh Function Using DCT Interpolation. Communication présentée à 25th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM 2017), Napa, California (p. 168-171). Tiré de https://doi.org/10.1109/FCCM.2017.12Communication de conférence Luinaud, T., Savaria, Y. & Langlois, J.M.P. (2017). An FPGA Coarse Grained Intermediate Fabric for Regular Expression Search. Communication présentée à Great Lakes Symposium on VLSI (GLSVLSI 2017), Banff, Alberta (p. 423-426). Tiré de https://doi.org/10.1145/3060403.3060429Communication de conférence Gao, S., Al-Khalili, D., Langlois, J.M.P. & Chabini, N. (2017). Decimal floating-point multiplier with binary-decimal compression based fixed-point multiplier. Communication présentée à 30th IEEE Canadian Conference on Electrical and Computer Engineering (CCECE 2017), Windsor, ON, Canada (6 pages). Tiré de https://doi.org/10.1109/CCECE.2017.7946692Communication de conférence Bendaoudi, H., Cheriet, F. & Langlois, J.M.P. (2017). Memory efficient multi-scale line detector architecture for retinal blood vessel segmentation. Communication présentée à Conference on Design and Architectures for Signal and Image Processing (DASIP 2016), Rennes, France (p. 59-64). Tiré de https://doi.org/10.1109/DASIP.2016.7853797Communication de conférence Sarbishei, I., Vakili, S., Langlois, J.M.P. & Savaria, Y. (2017). Scalable memory-less architecture for string matching with FPGAs. Communication présentée à IEEE International Symposium on Circuits and Systems (ISCAS 2017), Baltimore, MD (p. 2118-2121). Tiré de https://doi.org/10.1109/ISCAS.2017.8050818
- 2016
Communication de conférence Gan, Q., Seoud, L., Ben Tahar, H. & Langlois, J.M.P. (2016). Memory efficient and constant time 2D-recursive spatial averaging filter for embedded implementations. Communication présentée à Real-Time Image and Video Processing 2016, part of Photonics Europe 2016, Brussels, Belgium. Tiré de https://doi.org/10.1117/12.2223740Communication de conférence Vakili, S., Langlois, J.M.P., Boughzala, B. & Savaria, Y. (2016). Memory-efficient string matching for intrusion detection systems using a high-precision pattern grouping algorithm. Communication présentée à 12th ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS 2016), Santa Clara, California (p. 37-42). Tiré de https://doi.org/10.1145/2881025.2881031Communication de conférence Lacroix, A.B., Langlois, J.M.P., Boyer, F.-R., Gosselin, A. & Bois, G. (2016). Node configuration for the Aho-Corasick algorithm in intrusion detection systems. Communication présentée à 12th ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS 2016), Santa Clara, California (p. 121-122). Tiré de https://doi.org/10.1145/2881025.2889473
- 2015
Communication de conférence Bendaoudi, H., Gan, Q., Cheriet, F., Ben Tahar, H. & Langlois, J.M.P. (2015). A run-length encoding co-processor for retinal image texture analysis. Communication présentée à International Conference on Reconfigurable Computing and FPGAs (ReConFig 2015), Mexico City, Mexico (6 pages). Tiré de https://doi.org/10.1109/ReConFig.2015.7393354Communication de conférence Mosleh, A., Green, P., Onzon, E., Begin, I. & Langlois, J.M.P. (2015). Camera intrinsic blur kernel estimation: A reliable framework. Communication présentée à IEEE Conference on Computer Vision and Pattern Recognition (CVPR 2015), Boston, MA, United states (p. 4961-4968). Tiré de https://doi.org/10.1109/CVPR.2015.7299130Communication de conférence Vakili, S., Langlois, J.M.P. & Bois, G. (2015). Designing Customized Microprocessors for Fixed-Point Computation. Communication présentée à NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2015), Montréal, Québec. Tiré de https://doi.org/10.1109/AHS.2015.7231168
- 2014
Communication de conférence Keklikian, T., Langlois, J.M.P. & Savaria, Y. (2014). A Memory Transaction Model for Sparse Matrix-Vector Multiplications on GPUs. Communication présentée à 12th IEEE International New Circuits and Systems Conference (NEWCAS 2014), Trois-Rivières, Canada. Tiré de https://doi.org/10.1109/NEWCAS.2014.6934044Communication de conférence Bendaoudi, H., Cheriet, F., Ben Tahar, H. & Langlois, J.M.P. (2014). A Scalable Hardware Architecture for Retinal Blood Vessel Detection in High Resolution Fundus Images. Communication présentée à Conference on Design & Architectures for Signal & Image Processing (DASIP 2014), Madrid, Spain. Tiré de https://doi.org/10.1109/DASIP.2014.7115619Communication de conférence Seoud, L., Faucon, T., Hurtut, T., Chelbi, J., Cheriet, F. & Langlois, J.M.P. (2014). Automatic detection of microaneurysms and haemorrhages in fundus images using dynamic shape features. Communication présentée à 11th IEEE International Symposium on Biomedical Imaging (ISBI 2014), Beijing, China (p. 101-104). Tiré de https://doi.org/10.1109/isbi.2014.6867819Communication de conférence Mosleh, A., Langlois, J.M.P. & Green, P. (2014). Image deconvolution ringing artifact detection and removal via psf frequency analysis. Communication présentée à 13th European Conference on Computer Vision (ECCV 2014), Zurich, Switzerland (p. 247-262). Tiré de https://doi.org/10.1007/978-3-319-10593-2_17Communication de conférence Fasih, M., Langlois, J.M.P. & Cheriet, F. (2014). Retinal image quality assessment using generic features. Communication présentée à SPIE Medical Imaging, San Diego, California, USA. Tiré de https://doi.org/10.1117/12.2043325
- 2013
Communication de conférence Gill, D.C., Langlois, J.M.P. & Savaria, Y. (2013). Accelerating a modified gaussian pyramid with a customized processor. Communication présentée à Conference on Design and Architectures for Signal and Image Processing (DASIP 2013), Cagliari, Italy (p. 259-264). Tiré de https://ieeexplore.ieee.org/document/6661553Communication de conférence Gan, Q., Langlois, J.M.P. & Savaria, Y. (2013). A reformulated systematic resampling algorithm for particle filters and its parallel implementation in an application-specific instruction-set processor. Communication présentée à 56th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2013), Columbus, OH, USA (p. 1415-1418). Tiré de https://doi.org/10.1109/MWSCAS.2013.6674922Communication de conférence Vakili, S., Langlois, J.M.P. & Bois, G. (2013). Finite-precision error modeling using affine arithmetic. Communication présentée à 38th IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP 2013), Vancouver, BC, Canada (p. 2591-2595). Tiré de https://doi.org/10.1109/ICASSP.2013.6638124
- 2011
Communication de conférence Athow, J.L., Rozon, C., Al-Khalili, D. & Langlois, J.M.P. (2011). A CNFET-based characterization framework for digital circuits. Communication présentée à 18th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2011), Beirut, Lebanon (p. 681-684). Tiré de https://doi.org/10.1109/ICECS.2011.6122366Communication de conférence Farah, R., Gan, Q., Langlois, J.M.P., Bilodeau, G.-A. & Savaria, Y. (2011). A tracking algorithm suitable for embedded systems implementation. Communication présentée à 18th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2011), Beirut, Lebanon (p. 256-259). Tiré de https://doi.org/10.1109/ICECS.2011.6122262Communication de conférence Rajotte, S., Carolina Gil, D. & Langlois, J.M.P. (2011). Combining ISA extensions and subsetting for improved ASIP performance and cost. Communication présentée à IEEE International Symposium of Circuits and Systems (ISCAS 2011), Rio de Janeiro, Brazil (p. 653-656). Tiré de https://doi.org/10.1109/ISCAS.2011.5937650Communication de conférence Gil, D.C., Farah, R., Langlois, J.M.P., Bilodeau, G.-A. & Savaria, Y. (2011). Comparative analysis of contrast enhancement algorithms in surveillance imaging. Communication présentée à IEEE International Symposium of Circuits and Systems (ISCAS 2011), Rio de Janeiro, Brazil (p. 849-852). Tiré de https://doi.org/10.1109/ISCAS.2011.5937699Communication de conférence Vakili, S., Gil, D.C., Langlois, J.M.P., Savaria, Y. & Bois, G. (2011). Customized embedded processor design for global photographic tone mapping. Communication présentée à 18th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2011), Beirut, Lebanon (p. 382-385). Tiré de https://doi.org/10.1109/ICECS.2011.6122293Communication de conférence Farah, R., Langlois, J.M.P. & Bilodeau, G.-A. (2011). RAT: Robust animal tracking. Communication présentée à 9th IEEE International Symposium on Robotic and Sensors Environments (ROSE 2011), Montréal, Québec (p. 65-70). Tiré de https://doi.org/10.1109/ROSE.2011.6058509Communication de conférence Bilodeau, G.-A., Ghali, R., Desgent, S., Langlois, J.M.P., Farah, R., St-Onge, P.-L., Duss, S. & Carmant, L. (2011). Where is the rat? Tracking in low contrast thermographic images. Communication présentée à IEEE Computer Society Conference on Computer Vision and Pattern Recognition Workshops (CVPRW 2011), Colorado Springs, CO, United states (p. 55-60). Tiré de https://doi.org/10.1109/CVPRW.2011.5981685
- 2010
Communication de conférence Allaire, F.C.J., Langlois, J.M.P., Labonté, G. & Tarbouchi, M. (2010). Two-tiered resolution real-time path evaluation. Communication présentée à International Conference on Evolutionary Computation, Valencia, Spain. Tiré de https://www.scitepress.org/Papers/2010/30708/30708.pdf
- 2009
Communication de conférence Islam, A., Langlois, J.M.P. & Noureldin, A. (2009). A design methodology for the implementation of embedded vehicle navigation systems. Communication présentée à IEEE International Conference on Electro/Information Technology, Windsor, ON, Canada (p. 297-300). Tiré de https://doi.org/10.1109/EIT.2009.5189630Communication de conférence Aubertin, P., Mohammadi, H.M., Savaria, Y. & Langlois, J.M.P. (2009). High performance ASIP implementation of PBDI: a new intra-field deinterlacing method. Communication présentée à Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA 2009), Toulouse, France. Tiré de https://doi.org/10.1109/NEWCAS.2009.5290458Communication de conférence Bilodeau, G.-A., Levesque, M., Langlois, J.M.P., Lema, P. & Carmant, L. (2009). Thermographic body temperature measurement using a mean-shift tracker. Communication présentée à 2nd International Conference on Bio-Inspired Systems and Signal Processing (BIOSIGNALS 2009), Porto, Portugal (p. 18-24). Tiré de https://doi.org/10.5220/0001431300180024
- 2008
Communication de conférence Fontaine, S., Goyette, S., Langlois, J.M.P. & Bois, G. (2008). Acceleration of a target tracking algo-rithm using an application specific instruction set processor. Communication présentée à IEEE International Conference on Computer Design (ICCD 2008). Tiré de https://doi.org/10.1109/ICCD.2008.4751870Communication de conférence Daigneault, M.-A., Langlois, J.M.P. & David, J.P. (2008). Application Specific Instruction set processor specialized for block motion estimation. Communication présentée à IEEE International Conference on Computer Design (ICCD 2008), Lake Tahoe, CA (p. 266-271). Tiré de https://doi.org/10.1109/ICCD.2008.4751872Communication de conférence Tchoulack, S., Langlois, J.M.P. & Cheriet, F. (2008). A video stream processor for real-time detection and correction of specular reflections in endoscopic images. Communication présentée à Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA 2008), Montréal, Québec (p. 49-52). Tiré de https://doi.org/10.1109/NEWCAS.2008.4606318Communication de conférence Kong, M.Y., Langlois, J.M.P. & Al-Khalili, D. (2008). Efficient FPGA implementation of complex multipliers using the logarithmic number system. Communication présentée à IEEE International Symposium on Circuits and Systems, ISCAS 2008, Seattle, WA, United states (p. 3154-3157). Tiré de https://doi.org/10.1109/ISCAS.2008.4542127Communication de conférence Ngoyi, G.-A.B., Langlois, J.M.P. & Savaria, Y. (2008). Iterative design method for video processors based on an architecture design language and its application to ELA deinterlacing. Communication présentée à Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA 2008) (p. 37-40). Tiré de https://doi.org/10.1109/NEWCAS.2008.4606315Communication de conférence Torabi, A., Bilodeau, G.-A., Levesque, M., Langlois, J.M.P., Lema, P. & Carmant, L. (2008). Measuring an animal body temperature in thermographic video using particle filter tracking. Communication présentée à 4th International Symposium on Visual Computing (ISVC 2008), Las Vegas, Nevada (p. 1081-1091). Tiré de https://doi.org/10.1007/978-3-540-89639-5_103
- 2007
Communication de conférence Hireche, N., Langlois, J.M.P. & Nicolescu, G. (2007). A systolic array for sequence comparison based on two logic levels processing element. Communication présentée à IEEE Northeast Workshop on Circuits and Systems (NEWCAS 2007), Montréal, Québec (p. 73-76). Tiré de https://doi.org/10.1109/NEWCAS.2007.4487953Communication de conférence Gao, S., Chabini, N., Al-Khalili, D. & Langlois, J.M.P. (2007). FPGA-based efficient design approach for large-size two's complement squarers. Communication présentée à IEEE International Conference on Application-specific Systems, Architectures and Processors, Montréal, Québec (p. 18-23). Tiré de https://doi.org/10.1109/ASAP.2007.4429952
- 2006
Communication de conférence Gao, S., Chabini, N., Al-Khalili, D. & Langlois, J.M.P. (2006). An optimized design approach for squaring large integers using embedded hardwired multipliers. Communication présentée à ACS/IEEE International Conference on Computer Systems and Applications (p. 248-254). Tiré de https://doi.org/10.1109/AICCSA.2006.205097Communication de conférence Mohammadi, H.M., Langlois, J.M.P. & Savaria, Y. (2006). A threshold-based deinterlacing algorithm using motion compensation and directional interpolation. Communication présentée à 13th IEEE International Conference on Electronics, Circuits and Systems, Nice, France (p. 459-462). Tiré de https://doi.org/10.1109/ICECS.2006.379824Communication de conférence Langlois, J.M.P. (2006). Design and implementation of high sampling rate programmable FIR filters in FPGAs. Communication présentée à 4th IEEE International Northeast Workshop on Circuits and Systems (NEWCAS 2006), Gatineau, Que., Canada. Tiré de https://doi.org/10.1109/NEWCAS.2006.250949Communication de conférence Gao, S., Chabini, N., Al-Khalili, D. & Langlois, J.M.P. (2006). Efficient FPGA-based realization of complex squarer and complex conjugate using embedded mulitpliers. Communication présentée à IEEE International SOC Conference (SOCC 2006) (p. 21-24). Tiré de https://doi.org/10.1109/SOCC.2006.283835Communication de conférence Gao, S., Chabini, N., Al-Khalili, D. & Langlois, J.M.P. (2006). Efficient realization of large integers multipliers and squarers. Communication présentée à 4th IEEE International Northeast Workshop on Circuits and Systems (NEWCAS 2006), Gatineau, Que., Canada (p. 37-40). Tiré de https://doi.org/10.1109/NEWCAS.2006.250896Communication de conférence Mahvash, M.H., Savaria, Y. & Langlois, J.M.P. (2006). Real-time ELA de-interlacing with the Xtensa reconfigurable processor. Communication présentée à 4th IEEE International Northeast Workshop on Circuits and Systems (NEWCAS 2006), Gatineau, Que., Canada (p. 25-28). Tiré de https://doi.org/10.1109/NEWCAS.2006.250906Communication de conférence Hireche, N., Langlois, J.M.P. & Nicolescu, G. (2006). Survey of biological high performance computing: Algorithms, implementations and outlook research. Communication présentée à Canadian Conference on Electrical and Computer Engineering (CCECE 2006), Ottawa, Ontario (p. 1926-1929). Tiré de https://doi.org/10.1109/CCECE.2006.277302
- 2005
Communication de conférence Gilbert, G. & Langlois, J.M.P. (2005). Multipath greedy algorithm for canonical representation of numbers in the double base number system. Communication présentée à 3rd IEEE International Northeast Workshop on Circuits and Systems (NEWCAS 2005), Québec, Canada (p. 39-42). Tiré de https://doi.org/10.1109/NEWCAS.2005.1496665Communication de conférence Gao, S., Chabini, N., Al-Khalili, D. & Langlois, J.M.P. (2005). Optimized multipliers for large unsigned integers. Communication présentée à NORCHIP Conference, Oulu, Finlande (p. 78-81). Tiré de https://doi.org/10.1109/NORCHP.2005.1596993
- 2004
Communication de conférence Langlois, J.M.P., Al-Khalili, D. & Al-Hertani, H. (2004). Carry free, bit parallel approximate squarers with linear complexity and constant delay. Communication présentée à 2nd annual IEEE Northeast Workshop on Circuits and Systems (NEWCAS 2004), Montréal, Québec (p. 385-388). Tiré de https://doi.org/10.1109/NEWCAS.2004.1359116Communication de conférence Langlois, J.M.P. (2004). Design of linear phase FIR filters using particle swarm optimization. Communication présentée à 22nd Biennial Symposium on Communications, Kingston, Canada.
- 2003
Communication de conférence Langlois, J.M.P. & Al-Khalili, D. (2003). Low power direct digital frequency synthesizers in 0.18 μm CMOS. Communication présentée à IEEE Custom Integrated Circuits Conference (CICC 2003), San José, CA, USA (p. 283-286). Tiré de https://doi.org/10.1109/CICC.2003.1249404Communication de conférence Langlois, J.M.P. & Al-Khalili, D. (2003). Piecewise continuous linear interpolation of the sine function for direct digital frequency synthesis. Communication présentée à IEEE MTT-S International Microwave Symposium (IMS 2003), Philadelphia, PA, USA (p. A65-A68). Tiré de https://doi.org/10.1109/MWSYM.2003.1211035Communication de conférence Liu, Q., Langlois, J.M.P., Al-Khalili, D., Szwarc, V. & Ink, R. (2003). Synthesis of a 12-bit complex mixer for FPGA implementation. Communication présentée à Canadian Conference on Electrical and Computer Engineering (CCECE 2003), Montréal, Québec (p. 81-84). Tiré de https://doi.org/10.1109/CCECE.2003.1226349
- 2002
Communication de conférence Langlois, J.M.P. & Al-Khalili, D. (2002). A low power direct digital frequency synthesizer with 60 dBc spectral purity. Communication présentée à 12th ACM Great Lakes symposium on VLSI, New York, NY, USA (p. 166-171). Tiré de https://doi.org/10.1145/505306.505342Communication de conférence Langlois, J.M.P. & Al-Khalili, D. (2002). A new approach to the design of low power direct digital frequency synthesizers. Communication présentée à IEEE International Frequency Control Symposium and PDA Exhibition, New Orleans, USA (p. 654-661). Tiré de https://doi.org/10.1109/FREQ.2002.1075963Communication de conférence Langlois, J.M.P. & Al-Khalili, D. (2002). Hardware optimized direct digital frequency synthesizer architecture with 60 dBc spectral purity. Communication présentée à IEEE International Symposium on Circuits and Systems (ISCAS 2002), Scottsdale, Arizona, USA (p. 361-364). Tiré de https://doi.org/10.1109/ISCAS.2002.1010715
- 2001
Communication de conférence Langlois, J.M.P. & Al-Khalili, D. (2001). ROM size reduction with low processing cost for direct digital frequency synthesis. Communication présentée à IEEE Pacific Rim Conference on Communications, Computers and signal Processing (PACRIM 2001), Victoria, Canada (p. 287-290). Tiré de https://doi.org/10.1109/PACRIM.2001.953579
- 1999
Communication de conférence Langlois, J.M.P., Al-Khalili, D. & Inkol, R.J. (1999). A high performance, wide bandwidth, low cost FPGA-based quadrature demodulator. Communication présentée à IEEE Canadian Conference on Electrical and Computer Engineering (CCECE 1999), Edmonton, Canada (p. 497-502). Tiré de https://doi.org/10.1109/CCECE.1999.807248
- 2022
- Brevets (1)
- 2003
Brevet Al-Khalili, D. & Langlois, J.M.P. (2003). Phase to sine amplitude conversion system and method (Brevet n° US 6657573). Tiré de https://patents.google.com/patent/US6657573
- 2003
- Thèses (2)
- 2003
Thèse Langlois, J.M.P. (2003). Novel design approach and architectures for sinusoid output direct digital frequency synthesis (Thèse de doctorat, Royal Military College of Canada). Tiré de https://central.bac-lac.gc.ca/.item?id=NQ71892&op=pdf&app=Library
- 2000
Thèse Langlois, J.M.P. (2000). Design and implementation of wide band quadrature demodulators on field programmable gate arrays (Mémoire de maîtrise, Royal Military College of Canada, Kingston, Ontario). Tiré de https://central.bac-lac.gc.ca/.item?id=Mq44914&op=pdf&app=Library
- 2003